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STRUCT.LIB
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1990-10-26
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2KB
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41 lines
; SIO DRIVER DATA STRUCTURE DEFINITION
*L OFF
CHAN EQU 0 ;Channel number, 1 byte
DPORT EQU 1 ;SIO data port, 1 byte
CPORT EQU 2 ;SIO control port, 1 byte
DWAT EQU 3 ;TX idle channel time (DWAIT), 2 bytes
TXDLY EQU 5 ;TX turnon delay (TXDELAY), 2 bytes
SINIT EQU 7 ;SIO init parms (SYNC or ASYNC)
SINTL EQU 9 ;length of the above
FLAG EQU 10 ;General purpose flags as follows:
TIMER EQU 0 ;Bit 0 for BIT test
MTIMER EQU 01h ;This port has the timer on SYNC/HUNT (for TNC 2)
FULL EQU 1 ;Bit 1 for bit test
MFULL EQU 02h ;Mask for full duplex port
AFT EQU 6 ;Bit 6 for BIT test
MAFT EQU 40h ;Mask for port using AFT Framing (usually on Async)
ASYNC EQU 7 ;Bit 7 For BIT test
MASYNC EQU 80h ;We are running Async here (for TNC 2 and AFT)
WR5REG EQU 11 ;The current value stored in SIO WR 5
RR0 EQU 12 ;Last Read Reg 0
TSTA EQU 13 ;TX state, 1 byte
RSTA EQU 14 ;RX state, 1 byte
CBUF EQU 15 ;RX character buffer, 1 byte
TIMRUN EQU 16 ;Timer running flag
TXQ EQU 17 ;The current Transmit Queue, top item being sent
TXSEG EQU 19 ;The current segment being sent
RXQ EQU 21 ;The Receive buffer pool, top is being filled
RXPOS EQU 23 ;The Current WDATA pointer for recption
TXAFT EQU 25 ;AFT TX State
TXCRC EQU 26 ;AFT TX CRC
TBUF EQU 28 ;TX character buffer, 1 byte
RXAFT EQU 29 ;AFT RX State
RXCRC EQU 30 ;AFT RX CRC
RXCRCL EQU 32 ;Length of the CRC Buffer
CRBUF EQU 33 ;A 2 Byte buffer to insure the CRC doesn't get passed up
PTTMSK1 EQU 35 ;Mask to Invert meaning of RTS Pin
PTTMSK2 EQU 36 ;Mask to Invert meaning of RTS Pin
DCDTGL EQU 37 ;Mask to Invert meaning of DCD Pin
SDSLEN EQU 38 ;Length of data structure
SDSILEN EQU 12 ;Length of portion that is init'ed non-zero